A semiconductor device, such as a memory, a microcomputer or the like for use in a computer or the like, is manufactured by repeatedly carrying out transferring processes on a pattern such as a circuit or the like formed on a photomask by using an exposing process, a lithography process, an etching process and the like. In the manufacturing process of the semiconductor device, the quality of the results of processes such as the lithography process, the etching process or the like and the existence of a defect such as the occurrence of a foreign matter or the like, give great influences to the yield of the semiconductor device. Therefore, in order to improve the yield, a pattern inspection on a semiconductor wafer is carried out upon completion of each of the manufacturing processes so as to detect the occurrence of abnormality and the occurrence of a defect previously or in its early stage.
In the inspecting apparatus used for the above-mentioned processes, there have been strong demands for executing an inspection with high throughput and high precision so as to follow up an increase in the wafer diameter and a miniaturization of the circuit pattern. In order to inspect a large number of regions in a short period of time while maintaining high inspection precision, one of proposed inspection methods for the semiconductor device includes processes in which some of regions on a wafer previously specified are determined beforehand, and images of a plurality of portions are picked up during the execution of inspecting processes of one time, and the resulting images are inspected. Moreover, in order to confirm the reason of a process failure, a method has been widely used in which the amount of characteristics, such as the number of defects at each of portions in the entire wafer or in one portion thereof, is displayed on a wafer so that the tendency thereof is confirmed. For example, a patent described in Patent Document 1 has proposed a method in which a defect distribution formed into groups based upon a shot unit or a chip unit of an exposing device or a frequency distribution of the amount of characteristics is prepared so that by using the distribution, the cause of a defect of a semiconductor device is specified. Moreover, Patent Document 2 has proposed a method in which plurality of divided regions are formed on a wafer and by using the distribution of the amount of characteristics possessed by each of the regions, the distribution of defects occurred in the respective wafers are automatically classified based upon the wafer unit.
Patent Document 1: Japanese Patent Application Laid-Open Publication No. 2008-4641 (US2008/0004823)
Patent Document 2: Japanese Patent Application Laid-Open Publication No. 2004-288743 (US2004/0255198)